Proper Interface Clocking

[EBikales]

I just got a message from a tech at MOTU that I can connect the word clock of the 2408 to the Presonus, and leave the other 24 i/o's unconnected, since they're all receiving clock signals from the PCI-424 card. I'm certainly going to try that. I'd like to thank everyone for their interest and advice. I'm learning.
Eric

[ajdelange]

If you are at all handy with a soldering iron you ought to be able to make up a simple distribution amp from a handful of op amps, a few resistors and some BNC connectors. Connect a 75 Ohm resistor between the input BNC pin and ground (to properly terminate the input) and also connect this pin to the non-inverting pin of the first op-amp. Make this op-amp a voltage follower (unit gain) by connecting it's output pin directly to the inverting input. Also connect a 10K resistor to the output pin and ground it's other end and then wire the output pin to the non-inverting inputs of 3 or four additional op amps. These are the output stages. Connect a 1K resistor from the output of each of these to the inverting input and another 1K resistor from the inverting input to ground. This gives the stage a gain of 2. Now connect the output pin from each through a 75 ohm resistor (this sets the output impedance to match the cable) to the center pin of a output BNC. Impedance matching and the overall gain of 2 insure that if you put TTL level clock in you will get TTL level clock at each destination provided that it is properly terminated. Be sure to use a high speed op amp (see Mauser or Digikey catalogs or websites). I'm guessing that this could be done for under $50 with most of the cost being in the connectors and a box to put it in. Power with a pair of 9 volt batteries or use one of the single sided op-amps and use a wall wart.

[XYZ]

It is odd no one makes something like this.

Also, I've heard people have luck with video distribution amplifiers--it might be worth while looking into something like that.

[EBikales]

Thanks,
I love building stuff, so maybe I can whip up a little box and see if it works. I appreciate you sharing your knowledge with me on this. Hopefully today, I'll be able to try out the Presonus with word clock hooked up, to see if it works without the clicks. I'll report back.
Thanks again!

[steveo]

One thing in this thread that has been bothering me is the output termination. I don't see how it's possible to construct a WC output that would need to be terminated. An output can't be made "bridging" (hi-Z) like an input can, since it has to actually provide power to drive something. Note the previous few posts, where the op-amp outputs have a 75-ohm resistor to set their impedance.

IOW, just terminate the last unterminated input. If that input has a termination feature, use that instead of a T. If intermediate inputs have such a feature, turn it off or place it last.

Also, why not use CMOS (like a 74HC04) for this circuit? That would require only a single +5V supply, and one chip would give you five outputs, two chips would give you eleven. All guaranteed to be TTL levels. And the 75-ohm output impedance would be more accurate.

[ajdelange]

Yes, someone should but a cursory search doesn't turn one up. Video distribution amplifiers should serve as should clock distribution amplifiers (5, 10 MHz) for other applications.

BTW I measured the output impedance of my MOTU Traveller and found it to be 75 ohms (within measurement tolerance). The input impedance checked out at 111 oms at DC which means there is a 110 ohm resistor across the input jack. The AC impedance might be closer to 75 ohms (if, for example, there were a 10 ufd or bigger DC blocking cap and a 230 ohm resistor to ground behind that). Open circuit voltage from the source is 3.24 volt (TTL level) and if connected to a matched load of 75 ohms half that (1.62 V - plenty to trigger TTL) would appear at the receiver. If 111 ohms is the actual AC input impedance 1.93 V would appear across that.

[ajdelange]

One thing in this thread that has been bothering me is the output termination. I don't see how it's possible to construct a WC output that would need to be terminated....


Also, why not use CMOS (like a 74HC04) for this circuit? That would require only a single +5V supply, and one chip would give you five outputs, two chips would give you eleven. All guaranteed to be TTL levels. And the 75-ohm output impedance would be more accurate.

If it is like the MOTU design it does "need" to be terminated in order to minimize reflections and preserve wave shape (rise time is about 22 nS terminated but 30 nS unterminated) though, as has been noted, you may get away with running things unterminated. Also, if equipment (like the touted Big Ben) has a choice of unterminated or terminated you can, given that the receiver has high input impedance, tee from unit to unit terminating only the end of the cable either by adding a terminator or using the termination in the equipment. What is important is that no impedance discontinuity appear anywhere along the line. A high impedance "tap" does not represent a discontinuity (this is the way Ethernet used to work) because it is equivalent to attaching nothing to the center conductor of the cable. At the distal end the cable should see a load equal to its characteristic impedance. If it does not there will be a reflection whose amplitude and phase depend on the frequency of the harmonic in question (it's the relative amplitude and phases of harmonics that determine the shape of the signal) and the amount of mismatch. Note that in such a setup the master device does not deliver power to any of the slaves but rather only to its own output impedance and the line terminating impedance. The high impedance inputs only "sense" the voltage change. Of course, in fact, some power is delivered to the input chips but it is insignificant compared to the power delivered to the terminating resistor.

One cannot daisy chain MOTU gear in this way because its inputs (confirmed in the Traveler only) are terminated internally. Another problem with daisy chaining is that for every foot of cable you add you are adding 2 nS delay. For a 48 KHz clock with its 20,833 nS period that's not a big deal (2 nS ~ 0.034 degree of phase).

Certainly logic components could be used to do this job. The 74HCO4 hex inverter could be rigged to use 1 section as the receiver-inverter and its output could drive the remaining 5 sections for 5 outputs. I don't see how this would give more accurate control of the output impedance. I assume logic circuits have very low output impedances but I don't find anything about this on the data sheet for the 74HCO4. Logic designers are usually more concerned about "fanout" (how many downstream gates a device can drive). I chose op-amps in the example circuit I described because with them one has quite precise control over input and output impedances (and one can use the 2x gain trick so the output level is the same as the input in a matched system). I'm sure putting a 75 ohm resistor in series with the output of a 74HC04 would give an output impedance very close to 75 Ω.

[ajdelange]

Since I'm on a roll on this stuff I went ahead and measured the output impedances of two analogue outputs on my Traveler at 1 kHz. They came in at, respectively 186 and 204 ohms. Wouldn't it be nice if MOTU gave us some of this data.

I also checked the jitter when a second Traveler is clocked by an optical ADAT signal from a first i.e. the jitter measured between the clock output on the first Traveler (tied to the reference oscillator in this unit) and the clock output on the second (tied to the oscillator in the second which is phase locked to the ADAT input). Bulk delay between the two (including about 6 feet, i.e. 12 nS worth of fiber) is about 370 ns (that's 6.4° of clock phase for a 48 kHz clock or 0.64° for a 4.8 kH input). Peak to peak jitter appears to be about 10 nS (0.17° clock phase, 0.017° for a 4.8 kHz tone). RMS is probably 3-4 nS (0.07° clock, 0.007° on a 4.8 KHz tone). This implies that the best signal to noise ratio for a 4.8 kHz tone would be about 75 dB i.e. not even 16 bits worth so one might conclude that this isn't the best way do sync between units. OTOH, when synced with the word clock out BNC (connected to word clock in on the second unit) the jitter isn't any better nor is it if the second unit's sync is derived from S/PDIF. Bulk delay with word clock (and 6 feet of cable) is about 88 ns. With S/PDIF it's about 618.

[EBikales]

Hi Everyone,
I just wanted to let you know that the original problem with the Presonus Digimax seems to be fixed now, having been properly clocked to the 2408. (and the external clock button toggled to "on"!) The 24 i/o's apparently sync with the PCI-424 card via the firewire cables. In the future, I'd like to try a high-quality master clock, like the Big Ben, to improve the audio quality overall. But, I have a feeling that my next acquisition will be better pre-amps. I'd like to thank all those who added their expertise and were kind enough to share their experience with me. Seems like everyone who posted knows more about this stuff than I do. Oh well.
Thanks again.

[XYZ]

3-4 nS RMS Jitter out of the traveller? That sounds about 100 times more than it should be. To translate this into real terms, this would be like your speaker jumping forward or backward a few feet from sample to sample. That traveller must have no imaging capability at all. Can you hear a clear image with it? Something sounds troublesome here.

[steveo]

Here's everything you could possibly want to know about termination, from the mouth of one horse:

http://support.apogeedigital.com/index. ... tion-notes

Click on the "Termination: How and Why" link.

I don't see a jitter specification of any kind for the Big Ben, by the way. Measuring jitter isn't as simple as x nS, it has a whole spectrum, since it's noise.

[ajdelange]

It's not really that bad but it isn't that good either. A few nS of jitter would be equivalent to a few feet of movement of the source if sound traveled at the speed of light which it doesn't. Sound travels about 0.001mm in 3 nS. As I noted above 3-4 ns is equivalent to phase noise about 75 db below a tone at 4.8 kHz which puts it near the quantizing noise floor a a sin loaded 13 bit A/D converter (which certainly moots discussions about 16 vs 24 bits). My measurement technique is crude (there are no cesium locked synthesizers or computing DPOs here) and it is difficult to estimate rms from the display of my simple scope. So the rms could easily be half of what I guestimate - in fact it probably is as a peak to peak of 10 nS corresponds to 3 nS rms if the distribution is uniform which it certainly isn't. This would support 14 or more bits. The VCO in the part MOTU apparently uses is specified to have 0.1 nS jitter (the spec sheet doesn't say whether it's peak or rms but remember that's only part of the story. The phase noise of the reference oscillator and the loop bandwidth also contribute. For 24 bits rms jitter ought to be at the picosecond level and as we're a long way from that however bad my estimate you can see why I chuckle silently when people start arguing the relative merits of 24 bits vs 16. All this gives some credence to the Black Lion pitch who will replace the TI VCO in your MOTU (as well as the analog bits) and argue their jitter is in the 1 - 10 pS range which is about where it needs to be to support 24 bits.

[ajdelange]

Measuring jitter isn't as simple as x nS, it has a whole spectrum, since it's noise.

This is certainly true but it is also true that most of the energy in phase noise is to be found within (we hope) a fraction of a Hz of the "carrier". As phase noise is convolved with the input signal most of it, thus, appears within the signal bandwidth and much of that which doesn't (depending on amount of over sampling) get's folded (aliased) back in (jitter is applied after the antialiasing filter i.e. at the A/D). Thus, while the spectral distribution of phase noise is certainly of interest (as is it's Alan Variance) good estimates of signal to noise degradation from this source can be made by looking at the rms jitter. The biggest uncertainty in what I did lies in my estimate of the magnitude of the rms jitter in the time domain using a relatively low dollar Fluke O'scope. If I had the spectrum available I could have calculated the rms by integrating under it and gotten a better estimate but I don't have access to the kind of equipment required to make such measurements any more (retired).

I also looked at the Apogee tech note. The only thing I disagree with there are the effects of what they call "overtermination". Terminating a 75 ohm line with 56 ohms results is a reflection coefficient of exactly the same magnitude, 0.143, (but opposite sign) as "over terminating" it with 100 ohms which turns out to be the AC input impedance of the Traveler irrespective of whether it is powered on or not. Here again I feel I should point out that I do not have a network analyzer or impedance bridge but just the Fluke scope and, for a "standard", a 100 ohm resistor from Radio Shack. I also understand that Apogee are not in the business of educating electrical engineers so their explanation is probably adequate.

A.J.

[martian]

i cant believe it - my aardvark has just died !

actually i am a cheapskate - and as i supply all my files digitally for mastering and distribution.. so running on internal at the min..

the only catch is that i may need to make a da88 soon -

art syncgen anybody? $ 129 think it's got 4 outs?

http://www.sweetwater.com/store/detail/SyncGen/


anyone used one of these?

thanks

martin